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'ifl^tf^Ction
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i"^
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dalo^
TLB
&
rH
fx
rfa^e.
Consider
a
memory
system
with
the
following
parameters:
Translation
Lookaside
li
u^fer
has
512
entries
and
is
2-way
set
associative.
64Kbyte
LI
Data
Cache
has
128
byte
lines
and
is
also
2-way
set
associative.
Virtual
addresses
are
64-bits
and
physical
addresses
are
32
bits.
8KB
page
size.
72
I
Below
are
diagrams
of
the
cache
and
TLB.
What
is
the
number
of
bits
in
the
diagrams
labeled
A,
B,
C,...
^
^
n
T
Physical
address
Tag/status
Data
Tag/status
Data
)
E
D
T
I
©
Cache
F
I
G
H
Vi
Virtual
address
Tag/status
Data
Tag/status
Data
I
;r
TLB
Answer
A
B
C
D
E
\\
F
G
H
I
17 8
7
1024
18
42
9
13
19
1-3^-13^
(1-
The
following
table
is
a
stream
of
virtual
addresses.
Assume/4
KB^ages,
a
four-entry
fully
associative
TLB,
and
true
LRU
replacement.
If
pages
must
be
brought
in
from
disk,
increment
the
next
largest
page
number.
4095,
31272,15789,15000,
7193,4096,
8912
TLB
Valid
Physical
Page
Number
1
11
12
1
7
4
1
3
6
0
4
9
Page
table
I
X
J
V
t
L
0
(f
Valid
Phi^icaLpageorinij^k
1
5
0
Disk
0
Disk
1
6
1
9
1
11
0
Disk
1
4
0
Disk
0
Disk
1
3
1
12
Given
the
address
stream
above,
and
the
shown
initial
state
of
the
TLB
and
page
table,
show
the
final
state
of
the
system.
Also
list
for
each
reference
if
it
is
a
hit
in
the
TLB,
a
hit
in
the
page
table,
or
a
page
fault.
Answer:
(H:
Hit
in
TLB,
M:
Miss
in
TLB
hit
in
page
table,
PF:
Page
Fault)
VA
4095
31272
15789
15000
7193
4096
8912
VPN
0
7
3
3
1
1
2
H/M/PF
M
H
H
H
PF
H
PF
TLB
Valid
Tag
Physical
Page
Number
1
1
13
1
7
4
1
3
6
1
2
14
74
I
mArn
Page
table
Valid
Physical
page
or
in
disk
1
5
1
13
1
14
1
6
1
9
1
11
0
Disk
1
4
0
Disk
0
Disk
1
3
1
12
«
^
TLB
^
TMi^^B^TCPU
^
^
TLB
~
Cache
^>
f'
.
/
Hard
Disk
Virtual
C
Physical
Memory
Virtual
Page
no.
Physical
Physical
V
r
d
page
no.
Virtual
V
r
d
tag
page
i
TLB
U0.
Disk
address
1
1
0
1
3
Disk
address
2
1
1
Disk
address
3
Disk
address
4
1
2
Page
Table
0
12
3
I
tag
I
index
[
offset
|
Physical
address
1
0
1
.3
1
1
1
2
1
100
Tag
I
Index
I
100
r
I
Page
offeet
Vi
rtual
Page
no.
J
PU
Virtual
address